AMD laid out an aggressive server CPU roadmap at its Advancing AI 2026 event in San Francisco, announcing that the upcoming Zen 7 architecture will power three distinct EPYC processor families rather than a single monolithic lineup. The move reflects how fundamentally AI workloads are reshaping the server chip market, where one architecture no longer fits the range of compute, memory, and acceleration demands that data centers now face.
The Zen 7 generation, scheduled for 2028, will be split into EPYC Florence, EPYC Ferrara, and EPYC Fidenza. Florence serves as the mainstream EPYC family, covering both the SP7 platform for high-core-count flagship performance and the SP8 platform for value-optimized deployments. Ferrara is positioned as the AI-optimized rack-scale solution, designed to pair with AMD’s Instinct MI600 accelerators in the Helios 600 system. Fidenza rounds out the lineup with a focus on specific workload segments.
All three families will share the Zen 7 core architecture but are tuned differently for their target deployments. A key new feature across the line is ACE AI Compute Extensions, which accelerate matrix multiplication and AI inference directly within the CPU – an addition that signals AMD’s intent to compete with Nvidia’s specialized AI hardware not just at the GPU level but inside the server processor itself.
The Zen 7 processors will also support next-generation MRDIMM and LPDDR memory standards, addressing the bandwidth demands of large-model inference that current server memory architectures struggle to meet. The chips are expected to be manufactured on an advanced TSMC process node, likely the A16 or A14 class.
AMD also confirmed the next-generation Zen 8 architecture, codenamed EPYC Ravenna, for 2030, though no architectural details, core counts, or process information were disclosed.
The broader context for the announcement is a server CPU market in transition. Traditional general-purpose server chips are increasingly being supplemented or replaced by accelerators and domain-specific processors. By splitting its EPYC line into three families with distinct AI positioning, AMD is attempting to offer a CPU portfolio that can serve as the host processor for AI nodes, the compute engine for traditional workloads, and the optimized platform for inference at scale – all from the same core architecture but with different packaging and platform strategies.
The strategy also has implications for AMD’s Helios rack-scale system roadmap. Helios 500, arriving in 2027, pairs EPYC Verano CPUs with Instinct MI500 accelerators. Helios 600, in 2028, moves to EPYC Ferrara and Instinct MI600. The alignment of CPU and accelerator roadmaps within the same air-cooled and liquid-cooled rack form factors suggests AMD is betting that tightly integrated CPU-GPU pairs will be the dominant AI infrastructure topology through the end of the decade.
Sources: AMD splits Zen 7 into three EPYC families for 2028 (Tom’s Hardware, July 27, 2026); AMD confirms Zen 7 Epyc Florence for 2028 (TechSpot, July 25, 2026); AMD EPYC Zen 7 Florence confirmed with ACE (Phoronix, July 2026)