Every encrypted message, financial transaction, medical record, and government document stored today could remain vulnerable for years, not because of flaws in current cryptography, but because a future quantum computer may be able to break it in a single day. The response to that threat is now moving from software patches to the silicon itself.
On July 12, Swiss security company SEALSQ and American semiconductor manufacturer GlobalFoundries (GF) signed a strategic memorandum of understanding to jointly develop post-quantum security technologies that embed cryptographic protections directly into chip hardware. The partnership aims to build what both companies describe as “the foundation for the quantum era,” trusted digital infrastructure secured at the semiconductor level.
The timing is driven by a well-understood threat model. RSA and elliptic-curve cryptography, which underpin essentially all modern encrypted communications, are vulnerable to Shor’s algorithm running on a sufficiently powerful quantum computer. While such a machine does not yet exist, encrypted data captured today can be stored and decrypted retroactively once the technology matures, a scenario known as “harvest now, decrypt later.”
Post-quantum cryptographic algorithms already exist, thanks in part to NIST’s ongoing standardization effort. But they require significantly more computing resources and power than current encryption schemes. Software-only implementations are not sufficient; the algorithms must be integrated at the hardware level in servers, smartphones, industrial systems, and critical infrastructure.
The SEALSQ-GF partnership is structured around four technical focus areas. First, the companies will develop pre-certified security building blocks, ready-made components that other chipmakers can integrate into their processors. This work will involve MIPS, the chip-design company and GF subsidiary, to create certified security modules running post-quantum cryptography directly in hardware.
Second, they are designing a Chiplet Hardware Security Module (CHSM), security-focused chiplets destined for use in hardware security modules (HSMs) and secure enclaves, isolating critical data and operations from the rest of the device. Chiplets are smaller semiconductor components that combine like building blocks into larger systems.
Third, the partnership will develop cryogenic ASICs, application-specific integrated circuits designed to operate at near-absolute-zero temperatures. Current quantum processors require such extreme cold, but conventional electronics struggle in those conditions. This work builds on GF’s recently launched Quantum Technology Solutions business and SEALSQ’s existing quantum ASIC design expertise.
Fourth, all of the above will leverage mature CMOS manufacturing processes, the same technology used to produce most of today’s computer and smartphone chips, offering scalability and cost efficiencies.
“A shared long-term vision between GF and SEALSQ is that semiconductors, cybersecurity, Post-Quantum Cryptography, and quantum computing are converging into a single technology ecosystem,” said Carlos Moreira, CEO of SEALSQ and a UN cybersecurity expert.
Nicholas Sergeant, VP and head of quantum technology solutions at GF, said the partnership is “about building the foundation for the quantum era: trusted digital infrastructure secured by Post-Quantum Cryptography and the semiconductor technologies that will enable future quantum computing systems.”
The partnership is currently a strategic agreement rather than a product launch, with components in the design, testing, and validation stages. The timeline for commercial deployment will depend on how quickly the broader quantum computing ecosystem matures, including breakthroughs in error correction, qubit stability, and cooling.