Chinese chip startup Biren unveils optical interconnects targeting 1,024-chip AI clusters

Shanghai-based chip startup Biren Technology has introduced a near-packaged optics (NPO) interconnect system designed to link up to 1,024 AI accelerator cards into a single computing fabric, breaking past the roughly 128-GPU ceiling of traditional copper-based server architectures.

The industry’s biggest challenge is no longer individual chip performance but connecting thousands of accelerators into a unified system, said Ding Yunfan, vice president of AI framework architecture at Biren. “Improvements in the performance of a single graphics processing unit are no longer enough,” Ding said. “Instead, the industry’s biggest challenge is turning vast GPU clusters into unified, seamless computing platforms.”

Conventional copper interconnects are approaching their physical limits, capping server architectures at around 128 GPUs due to signal loss and bandwidth constraints. Biren’s NPO approach positions optical fibers closer to the chip, dramatically increasing bandwidth while reducing signal degradation. The company projects mass commercial deployment around 2028.

Biren is pursuing a dual strategy: an orthogonal hardware architecture developed with ZTE that uses conventional electrical connections as a nearer-term option, alongside the NPO optical prototype that targets clusters exceeding 512 cards per supernode, with a ceiling of 1,024.

Biren competes in a growing field of Chinese firms racing to build AI infrastructure. MetaX’s Xijing S600 achieves 64 GPUs per rack by eliminating external cabling within a single enclosure; Enflame and Alibaba are developing their own supernode architectures. Nvidia’s current NVL72 supports 72 GPUs, with the next-generation NVL144 expected to double that figure.

The optical-interconnect push comes as Chinese AI companies navigate US export controls that limit access to the most advanced Nvidia GPUs, making domestic cluster efficiency and scale a national priority.

Sources: Chinese startup introduces next-gen optical links to connect thousands of high performing chips (Interesting Engineering, Jul 18)

Scroll to Top