AMD has formally abandoned HBM (high-bandwidth memory) in its programmable chip lineup, replacing it with LPDDR5X on-package memory, a move that represents a roughly 65% bandwidth cut and underscores just how completely the AI boom has consumed the global HBM supply.
The company’s new Versal Premium Gen 2 Memory on Package (MoP) family integrates up to 32 GB of LPDDR5X directly onto the chip package, delivering 288 GB/s of bandwidth. The previous Versal HBM series, built around HBM2e, offered up to 840 GB/s. AMD began the process of discontinuing the HBM-equipped chips in September 2025, citing a lack of HBM2e supply. Final orders were accepted through June 30, 2026, the same day the MoP announcement was made.
Why AMD pivoted
The root cause is straightforward: the AI industry’s insatiable demand for HBM. Nvidia’s AI accelerators, AMD’s own Instinct GPUs, and a wave of custom AI chips all compete for the same pool of HBM3 and HBM2e memory produced by SK hynix, Samsung, and Micron. For a programmable-logic division serving FPGA customers with long product lifecycles, often 15 years or more, securing a stable HBM supply became untenable as memory manufacturers shifted production to higher-margin, higher-volume AI products.
LPDDR5X, by contrast, has a broader supply base and a longer production tail. It is manufactured in higher volumes across more fabs, giving AMD’s FPGA customers the long-term availability guarantees their products require.
What the new chips offer
The Versal Premium Gen 2 MoP family includes three initial models: the 2VP3422, 2VP3522, and 2VP3622. Each integrates 32 GB of LPDDR5X through eight 32-bit memory controllers operating at up to 9,000 MT/s. The on-package design eliminates the need for engineers to route high-speed memory traces across the circuit board, reducing board area by up to 60% and cutting development time by removing signal-integrity and power-integrity validation work.
The chips retain the full Versal Premium Gen 2 feature set, including PCIe 6.0 with CXL 3.1 support, 600G Ethernet, and on-chip cryptographic accelerators capable of running encryption in real time on 400 Gb/s networks. AMD says the MoP design targets customers who need a more integrated, turn-key solution for faster product development, particularly in networking, aerospace, and industrial applications.
Sampling begins at the end of 2026, with production shipments expected in the second half of 2027.