Meta has built a custom Compute Express Link (CXL) ASIC called Vistara that rescues DDR4 memory from retiring servers and puts it back to work in new machines, a practical response to both hardware waste and the soaring cost of DRAM.
The problem is structural. About 40 per cent of Meta’s vast server fleet cannot increase memory, locking millions of machines out of certain workloads. Servers have a three-to-five-year expected service life, but DDR4 DIMMs remain useful for seven to ten years. With memory prices surging, the industry is calling it a “RAMpocalypse”, buying new RAM is expensive. Reusing old DIMMs avoids that cost entirely.
Vistara is designed around a PCIe Gen5 x16 interface compliant with CXL 2.0 and 1.1. Each chip integrates two independent 72-bit DDR4 memory channels supporting speeds up to 3,200 MT/s and up to 256 GB per chip using 64 GB DIMMs. Two custom RISC-V processors drive the ASIC. The physical unit housing Vistara, called a MemServer, pairs an AMD Turin processor (158 cores) with 768 GB of local DDR5 and 256 GB of reused DDR4.
The DDR4 memory appears to the operating system as a distinct, CPU-less NUMA node. Meta’s platforms use all available local DDR4 first, then fall back to CXL-enabled memory as needed. All Linux kernel driver modifications are either already upstream or on their way there.
Deployed across millions of servers in production, Vistara handles disaggregated ML inference (embedding tables for recommendation systems), big data processing with Spark and Hive, databases, distributed caches, and CI/CD build systems. The payoff: a 25 per cent reduction in server count for disaggregated inference workloads and a 33 per cent reduction in out-of-memory failures and associated job restarts.
Meta presented the technology at ISCA 2026 on June 29.