Intel’s EMIB packaging gains traction as Google taps its technology for next-gen TPUs

Google’s next-generation tensor processing unit, codenamed Humufish, will use Intel’s EMIB-T advanced packaging technology instead of TSMC’s industry-standard CoWoS, according to semiconductor analysis firm SemiAnalysis.

The decision marks a significant win for Intel’s foundry business under CEO Lip-Bu Tan and signals growing demand for alternatives to TSMC’s capacity-constrained advanced packaging lines. As AI workloads drive exponential demand for custom silicon, chip designers are actively seeking second sources for the complex assembly process that bonds logic dies with high-bandwidth memory.

How EMIB differs from CoWoS

TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) technology places all dies on a large silicon interposer, which is fabricated using lithography and is therefore constrained by photomask reticle limits, capping the maximum package size at roughly 3.3 times the mask area. Intel’s EMIB (Embedded Multi-Interconnect Bridge) takes a different approach, embedding small silicon bridges directly into the organic substrate only where die-to-die connections are needed.

This eliminates the expensive interposer entirely, reduces silicon waste from cutting rectangular pieces from round wafers, and is not constrained by photomask limits, making it more scalable for the large, complex packages AI chips require.

EMIB-T delivers power vertically

Humufish specifically uses EMIB-T, where “T” stands for Through-Silicon Via. Standard EMIB bridges carry only data signals, forcing power to route around them through the substrate. EMIB-T delivers power directly through the silicon bridge vertically, adding integrated capacitors and ground planes for cleaner power delivery, an architecture designed to support next-generation HBM (High Bandwidth Memory) standards.

SemiAnalysis noted that Google’s selection of EMIB-T over CoWoS-L (TSMC’s own bridge-based alternative) suggests Humufish’s structured data flows for inference and agent workloads benefit from putting high-density interconnects only where needed, rather than paying for full-package wiring flexibility.

Intel’s EMIB yield rates have reportedly exceeded 90 percent, with mass production of Humufish expected in 2027. The move also adds to Intel’s recent foundry momentum, including Tesla’s adoption of Intel’s 14A process for its Terafab AI chip campus and a reported preliminary agreement with Apple for chip manufacturing.

Sources: Intel’s EMIB packaging gains traction (Tom’s Hardware, July 15, 2026); SemiAnalysis: Google’s next-gen TPU to use Intel EMIB-T (SemiAnalysis, July 1, 2026)

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